一、CC2500芯片概要
The CC2500 is a low cost true single chip 2.4GHz transceiver designed for very low power wireless applicati***. The circuit is intended for the I*** (Industrial, Scientific and Medical) and SRD (Short Range Device) frequency band at 2400-2483.5 MHz. The RF transceiver is integrated with a highly configurable baseband modem. The modem supports various modulation formats and has a configurable data rate up to 500 kbps. The communication range can be increased by enabling a Forward Error Correction option, which is integrated in the modem. CC2500 provides extensive ha***are support for packet handling, data buffering, burst tran***issi***, clear channel asses***ent, link quality indication and wake-on-radio. The main operating parameters and the 64-byte tran***it/receive FIFOs of CC2500 can be controlled via an SPI interface. In a typical system, the CC2500 will be used together with a microcontroller and a few additional passive components.
CC2500是一种低成本真正单片的2.4GHz收发器,为低功耗无线应用而设计。电路设定为2400-2483.5MHz的I***(工业,科学和***)和SRD(短距离设备)频率波段。RF收发器集成了一个数据传输率可达500kbps的高度可配置的调制解调器。通过开启集成在调制解调器上的前向误差校正选项,能使性能得到提升。CC2500为数据包处理、数据缓冲、突发数据传输、清晰信道评估、连接质量指示和电磁波激发提供广泛的硬件支持。CC2500的主要操作参数和64位传输/接收。FIFO(***先出)可通过SPI接口控制。在一个典型系统里,CC2500和一个微控制器及若干被动元件一起使用。
二、产品图片资料
TY-CC2500-PCB
三、应用领域
1、2400-2483.5MHz I***/SRD band systems 2400-2483.5MHz I***/SRD波段系统
2、C***umer Electronics 电子消费产品
3、Wireless game controllers 无线游戏控制器
4、Wireless audio 无线音频
5、Wireless keyboard and mouse 无线键盘和鼠标
四、引脚功能
Pin No |
Pin Name |
Pin Type |
Description |
1 |
VCC |
Power |
1.8V-3.6V power 1.8-3.6电源 |
2 |
SI |
Digital Input |
Serial configuration interface, data input 串行配置接口,数据输入 |
3 |
SCLK |
Digital Input |
Serial configuration interface, clock input 串行配置接口,时钟输入 |
4 |
SO (GDO1) |
Digital Output |
Serial configuration interface, data output. 串行配置接口,数据输出 Optional general output pin when CSn is high CSn高电平时,可选通用输出 |
5 |
GDO2 |
Digital Output |
Digital output pin for general use: 通用数字信号输出: Test signals 测试信号 FIFO status signals ***先出状态信号 Clear Channel Indicator 空闲信道指示 Clock output, down-divided from XOSC 时钟输出,从XOSC分频 Serial output RX data 串行输出接收数据 |
6 |
GND |
Ground |
GND地 |
7 |
GDO0 (ATEST) |
Digital I/O |
Digital output pin for general use: 通用数字信号输出: Test signals 测试信号 FIFO status signals ***先出状态信号 Clear Channel Indicator 空闲信道指示 Clock output, down-divided from XOSC 时钟输出,从XOSC分频 Serial output RX data 串行输出接收数据 Serial input TX data 串行输入发射数据 |
8 |
CSn |
Digital Input |
Serial configuration interface, chip select 串行配置接口,芯片选择 |